For example, System in Package (SiP) integration is a trend in the semiconductor packaging industry to reduce the system form factor, costs and increase performance. Some approaches are side by side (SbS) die arrangements, 3D die stacking (3D), package on package (PoP) stacking and integration of passive components (integrated passive devices IPDs and surface mounted devices SMDs) into packages.
For example, the low z-height requirements for PoP (e.g. 1.0 mm) can limit the possibilities for integration of standard components like SMDs or MEMs (micro-electro-mechanical systems). Only flat components especially designed for system integration may be usable but that reduces flexibility and increases costs.